Cadence Offers NC-Sim Plus Front-End Logic Design and Verification Package
Bundle Includes NC-Sim, Verification Cockpit, TestBuilder, and BuildGates Tools
PARIS--(BUSINESS WIRE)--March 5, 2002--Cadence Design Systems,
Inc. (NYSE: CDN - news), the world's leading supplier of electronic design
products and services, today announced a powerful new NC-Sim Plus
package that provides an integrated front-end logic design solution.
NC-Sim Plus includes the Cadence® best-in-class NC-Sim mixed
language simulator, TestBuilder open-source testbench development
tool, Verification Cockpit functional verification tool, and the
BuildGates® synthesis tool.
"In this era of multi-million gate ASICs, reusable IP, and SoC
designs, verification has become the major bottleneck in getting
designs released," said Rahul Razdan, corporate vice president and
general manager of Systems and Functional Verification at Cadence. "It
is a real challenge for engineers to know when a design has been
verified and meets specified implementation criteria. Our unique
solution combines the tools required to provide reliable answers to
today's verification-through-implementation challenges."
NC-Sim Plus directly addresses the key challenge that verification
engineers face: the lack of a reliable means to confirm that their
design has been fully verified. Without this information, designers
are often caught in a cycle of design respins that are costly and
time-consuming. NC-Sim Plus brings together the tools that give
engineers the confidence that their designs have been fully verified.
"NC-Sim Plus makes it possible for us to increase our productivity
while reducing the cost of our EDA expenditure," said Kaushik Patel,
Vice President of Engineering at Azanda Network Devices. "It gives us
the highest level of base simulation performance, the ability to raise
the level of abstraction at which we design, and the ability to debug
and analyze our designs at the transaction level. And we also get a
synthesis tool, which makes this package a complete front-end digital
design solution."
At the center of this new product bundle is NC-Sim, the fastest
and most robust mixed-language simulator on the market. It was
designed to handle the most complex ASIC, SoC, and FPGA designs. The
open-source TestBuilder testbench development tool provides the first
step in creating a transaction-based verification environment. It is
based on the familiar C++ language and includes a set of C++ class
libraries with the transaction models and functions designers need.
Verification Cockpit provides transaction-based analysis
capabilities. It is a powerful, mixed language functional verification
environment that integrates multiple tools and methodologies to
accelerate functional convergence. BuildGates synthesis tool enables
rapid synthesis of multi-million-gate designs with superior results.
It features the Cadence common timing engine, which provides
high-capacity and high-performance timing analysis.
About Cadence
Cadence is the largest supplier of electronic design automation
products, methodology services, and design services used to accelerate
and manage the design of semiconductors, computer systems, networking
and telecommunications equipment, consumer electronics, and a variety
of other electronics-based products. With approximately 5,700
employees and 2001 revenues of approximately $1.43 billion, Cadence
has sales offices, design centers, and research facilities around the
world. The Company is headquartered in San Jose, Calif. and traded on
the New York Stock Exchange under the symbol CDN. More information
about the company, its products and services is available at
http://www.cadence.com.
Cadence, the Cadence logo, and BuildGates are registered
trademarks of Cadence Design Systems, Inc. All other trademarks are
the property of their respective owners.
Contact:
Cadence Design Systems, Inc.
Valerie J. Smith, 408/428-5795
vsmith@cadence.com
